Semiconductor integrated circuit (IC) is constructed by transistors built on a semiconductor substrate and upper layer wires used to connect transistors. The patterns of the transistors and wires are determined in the IC design stage. The interconnections between the transistors cannot be changed after fabrication.
In reconfigurable circuits such as FPGAs (Field-Programmable Gate Arrays), configuration data including operation and interconnection information is stored in memories, so that different logic operations and interconnections can be realized by configuring the memories after fabrication according to requirements of end users. In most of commercial FPGAs, SRAM (Static Random Access Memory) is used to store the configuration data.
Typically, each SRAM is composed of 6 transistors and each modern FPGA chip has more than 10M SRAMs, which causes extremely large area overhead and cost. Data routing is realized by a large number of CMOS switches (each composed of one SRAM and one nMOS transistor), which causes low logic density, large power consumption and large delay.
To overcome the problems of SRAM-based FPGAs, non-volatile resistive switches (NVRSs) integrated between wires up on transistor layer have been proposed for small area overhead. Non-volatility also contributes to zero standby power consumption.
As an example, in the reconfigurable circuits shown in the non-patent document 1 and patent document 1, a non-volatile resistive atom switch (NVRAS) composed of a solid-electrolyte sandwiched between an active electrode (Cu) and an inert electrode (Ru) has high OFF/ON resistance ratio (>105), therefore the NVRAS can replace the CMOS switch for small area overhead and high logic density. Moreover, lower capacitance of the NVRAS than nMOS transistor leads to low power consumption and high speed. The ON/OFF state of the NVRAS is hold even when not powered, therefore when power is turned on configuration data can be loaded immediately.